Fall 2020 -- ECE 302, Electronic Circuits syllabus
PSpice Lite 16.6 link
Positive clamp analysis for (VR-VdON) > VA
Checking for Ebers-Moll and Spice (Gummel-Poon) model equivalency
Additional comments on emitter bias circuit design rules
Redrawing PNP emitter bias circuit similarly to that of NPN
Additional reasoning behind Giacoletto / hybrid π model
Calculating capacitor resistances for the CE amp with Giacoletto-modeled BJT
Finding R1s and R2s of the CE amp with Giacoletto-modeled BJT via SCTC technique
Finding R1, R2, R3 in basic differential amp
JFET in 1st and 3rd quadrants, a new condition for VGS and VGD
Biasing the FET: some general considerations