Ravi Krishna Shaga                 


  Test Station Development  |  Analog Feature Extraction | Sigma-Delta Learning |

 

Test Station Development :

The test station developed consists of an Opalkelly FPGA (XEM3010) integratred directly onto the motherboard. The Opalkelly FPGA has a high speed USB interface which enables real-time control through the host PC. The FPGA is also equipped with 32MB SDRAM on-board memory for data acquisition. The motherboard is also equipped with several programmable DAC's used to set the voltage bias. The daughter board with the test chip can be surmounted on top of this board.  






                                Fig.1  :  OpalKelly FPGA board interfaced with the motherboard

The test station was used for speech feature extraction using a LPC sigma-delta modulator. The block diagram of the same is shown below in Fig.2 . The input speech signals are generated by programming the DAC's present on the motherboard using the FPGA. The NI card interface is used to set all the bias voltages required for the chip and all the clock signals are generated by the FPGA. 
                                
                Fig. 2 : Block diagram showing the interface between the test chip, the OpalKelly FPGA and the PC

The input speech signal which is initially stored on the on-board memory is played to the chip through the programmable DAC. The same on-board memory is also used for data acquisition from the chip which is then relayed back to the host through the USB interface. Fig.3a  shows a sample utterance "26" taken from the standard YOHO database and Fig.3b shows the corresponding corresponding features generated.

                     Fig. 3a  Waveform of the utterance '26'                     Fig.3b : 6 dim. features extracted from the LPC
                                                                                                                                                   Sigma-Delta Modulator