SKILLS:

PROJECTS:

• Enhanced the Minimum Power Configuration Protocol for Wireless Sensor Networks:
  • Improved the wireless network life time by 5-10% by improving the MPCP routing protocol. The algorithm was implemented on MATLAB and simulated using Prowler and RMASE.
• Low power AES implementation for secure wireless communication across implantable devices:
  • Created an automated digital flow to generate a low power AES implenetation (layout) targeted for wireless implantable systems.
• Wireless Sensor Network for monitoring animal subjects:
  • Created a wireless sensor nodes using an embedded system consisting of a Zigbee transceiver and a PIC18 microprocessor to monitor and correlate neural activities among multiple freely behaving animal subjects.
• RF transponder and reader for an implantable strain sensor:
  • Designed a RF transponder which has a strain sensor connected as a load. The RF reader will represent the change in the strain sensor as a change in the output voltage. The Circuit was designed with off-the-shelf components.
• Fabricated and tested a Digitally Controlled Magnetic Force Actuator using AMI 0.5 micron CMOS:
  • Designed and Tested a magnetic force actuator which was fabricated using AMI 0.5 microns. Initial tests were done manually using Oscilloscope.
• 900 MHz GSM Digital Class E Power Amplifier using AMI 0.5 micron CMOS:
  • Designed an All-On-Chip Digital controlled class E power amplifier that contains an 8-bit control inputs, 8-to-3 decoder, two On-Chip inductors, and two On-Chip capacitors. This Circuit was designed using Cadence Virtuoso (Layout), Digital decoder written in VHDL and verified using Cadence NC Logic Verifier, Inductors using ASITIC, Circuit place and route using Silicon Ensemble, and simulation using SpectreRF.
• Inverter Chain Optimizations using TSMC 0.25 micron CMOS:
  • Optimized three different inverter chains schematics to achieve Outpin-Pin Delay minimization, overall energy reduction in the chain, and layout area reduction. The schematics were simulated using Spectre.
• Reducing Dynamic Power Consumption by exploiting operand values:
  • Reduced the overall power consumption for an 8-bit comparator and a ripple carry adder by introducing logic to the circuit to override and skip computations when the answer is intuitive. Circuits were simulated using Spectre.
• 900 MHz GSM LNA and Mixer using AMI 0.5 micron CMOS:
  • Designed an All-On-Chip differential low Noise amplifier as well as a Gilbert Mixer. The LNA contains six On-Chip inductors. The Mixer contains two On-Chip resistors. Both circuits were designed on Cadence Virtuoso (Layout) and simulated using SpectreRF.
• Implementing and Analyzing MAC layer Quality of Service (QoS) for 802.11:
  • Implemented a wireless sensor network using the NS2 simulator with a modified MAC layer that benefits from changing the “Contention Window” to decrease the end to end delay. The modified MAC layer was written in C++, the test circuits in TCL, and the results parser in Perl.
• Performance Analysis, Network Density Impact, and Flow interference of AODV and 802.11:
  • Investigated the impact of neighboring effects on network performance using TCP and UDP protocols under the NS2 simulator. Test topologies were written in TCL and the result parser was written in Perl.
• Error tolerant/Multimedia friendly encryption using a modified 128-bit AES algorithm:
  • Designed a modified implementation of the AES encryption algorithm in C. The implementation kept the images transferred using a noisy channel viewable and understandable even after being altered with erroneous decryption.
• NASA - Hubble Remote Module Docking (Third best undergraduate ECE project):
  • Designed a Robot Management System in C (3000 lines) to be installed on an embedded system that is used inside the robot. The system provided a universal interface for all components, arms, wheels, sensors, etc by providing a modular and expandable design which allowed remote controlling, power saving, and resource utilizing easier and more beneficial.
• Networking and Routing over XILINX FPGAs using VHDL:
  • Designed a full duplex network connection between FPGAs. if more than two FPGA are present one will be selected to route the packets across all of them. A protocol similar to RS232 was used for communication.
• Custom OS projects: Virtual Memory, Custom Shell:
  • Designed Various Operating System Projects in C like CSH shell clone, Virtual Memory, etc.
• Self-Guided VLSI Design: Fire and Security Alarm using AMI 0.5 micron CMOS:
  • Designed a Digital Fire and Security Control System which can be attached to a key pad, fire sensors, fire sirens, and door sensors.
• Port Scanning Detector:
  • - A Cross platform port scanner detector (like nmap) which uses libpcap and runs in the background as a service to monitor suspicious remote scanning activities TCP, UDP, ICMP, etc then report them to the administrator by email. Written in C.

Prepared by Faisal T. Abu-Nimeh
Last update: 12/23/2009