|
1000
|
1
|
EFFECT OF ORDERING ON HOMOTOPY EQUATIONS FOR CALCULATING MULTIPLE DC OPERATING POINTS. | LECTURE | TP2 | aharo@elca1.inaoep.mx |
|
1000
|
2
|
IMPLEMENTATION OF RNS ANALYSIS AND SYNTHESIS FILTER BANKS FOR THE ORTHOGONAL DISCRETE WAVELET TRANSFORM OVER FPL DEVICES | LECTURE | FA4 | jramirez@ditec.ugr.es |
|
1000
|
3
|
CHARACTERIZATION OF A CMOS CURRENT-STEERING DAC USING STATE-SPACE MODELS | LECTURE | TA3 | olaa@isy.liu.se |
|
1000
|
4
|
MATHEMATICAL UNIFICATION OF DYNAMIC-ELEMENT-MATCHING METHODS FOR SPECTRAL SHAPING OF HARDWARE-MISMATCH ERRORS | POSTER | FAP1 | jeffc@alum.mit.edu |
|
1000
|
7
|
2-V, 1-GHz CMOS Inductorless LNAs with 2-3dB NF | LECTURE | TA4 | sharaf@asunet.shams.eun.eg |
|
1000
|
8
|
A Novel Linear Tunable MOS Transconductor | POSTER | WPP2 | kkuo@ece.sunysb.edu |
|
1000
|
9
|
A NEW CASCADED SIGMA DELTA MODULATOR STRUCTURE USING MULTI-BIT QUANTIZERS COMBINED WITH SINGLE-BIT FEEDBACK | LECTURE | TP1 | lbingxin@ele.kth.se |
|
1000
|
11
|
DESIGN OF CMOS COMPOSITE TRANSISTORS WITH IMPROVED OPERATING REGION | LECTURE | S7 | yoo_seoungjae@hotmail.com |
|
1000
|
12
|
A NOVEL MULTI-INPUT SINGLE-OUTPUT FILTER WITH REDUCED NUMBER OF PASSIVE ELEMENTS USING SINGLE CURRENT CONVEYOR | LECTURE | S7 | kuntman@ehb.itu.edu.tr |
|
1000
|
13
|
BEHAVIORAL MODELING AND SIMULATION OF PHASE-LOCKED LOOPS FOR RF FRONT ENDS | POSTER | WAP2 | m.hinz@tu-bs.de |
|
1000
|
14
|
A COMPARISON OF HARDWARE EFFICIENT DYNAMIC ELEMENT MATCHING NETWORKS FOR DIGITAL TO ANALOG CONVERTERS | LECTURE | TA3 | jwbruce@ee.unlv.edu |
|
1000
|
15
|
DESIGN AND PROTOTYPING OF A SIGMA-DELTA DECIMATOR FILTER FOR DECT STANDARD | LECTURE | TA4 | lirida.naviner@enst.fr |
|
1000
|
16
|
CMOS Mixed-Mode Adaptive Circuit for Analog LMS Algorithm | POSTER | TPP2 | fgomezc@prodigy.net.mx |
|
1000
|
18
|
A CMOS TRANSCEIVER CIRCUIT FOR MULTI-AMPLITUDE CONTINUOUS PHASE MODULATION | LECTURE | TA4 | hazemali@dataxprs.com.eg |
|
1000
|
19
|
A 1.2 V MICROPOWER CMOS OP AMP WITH FLOATING-GATE INPUT TRANSISTORS | POSTER | TAP2 | elvi@ee.oulu.fi |
|
1000
|
20
|
SOLID AND LITZ-WIRE WINDING NON-LINEAR RESISTANCES COMPARISON | POSTER | WPP2 | reatti@diefi.die.unifi.it |
|
1000
|
23
|
A 1.5-V, 2.4GHz CMOS Low-Noise Amplifier | POSTER | TPP2 | yjn@mhit.edu.tw |
|
1000
|
24
|
A 1-V 5 µW CMOS-OPAMP WITH BULK-DRIVEN INPUT TRANSISTORS | LECTURE | S7 | kimmo.lasanen@ee.oulu.fi |
|
1000
|
25
|
IMPLEMENTATION OF A UNIQUE MICROWAVE FREQUENCY SYNTHESIZER WITH OCTAVE TUNING RANGE | POSTER | WPP2 | wli@intec.rug.ac.be |
|
1000
|
26
|
JOINT SHAPING OF QUANTIZATION AND HARDWARE-MISMATCH ERRORS IN A MULTIBIT DELTA-SIGMA DAC | LECTURE | TA3 | scholnik@nrl.navy.mil |
|
1000
|
29
|
Real-time Performance Analysis of MPEG-4 Systems Abstract and Summary | POSTER | FAP2 | Kathy.Moseler@motorola.com |
|
1000
|
31
|
Stability Analysis of Multiple Feedback oversampled Sigma-Delta A/D Convertor Configurations | LECTURE | TA3 | nowr@ee.ualberta.ca |
|
1000
|
32
|
AN ADAPTIVE STRUCTURE FOR SIGMA DELTA MODULATION WITH IMPROVED DYNAMIC RANGE | POSTER | WPP1 | dajani@ucla.edu |
|
1000
|
33
|
A 3.3V 10BIT CURRENT-MODE FOLDING AND INTERPOLATING CMOS A/D CONVERTER WITH AN ARITHMETIC FOLDING BLOCK | LECTURE | TA3 | g1991195@inhavision.inha.ac.kr |
|
1000
|
34
|
Low Voltage CMOS Transconductors using the Series Composite Transistor | POSTER | TPP2 | chyun@core.woosuk.ac.kr |
|
1000
|
35
|
An Analysis of Dynamic Element Matching Algorithms for Analog to Digital Converters | LECTURE | TA3 | stubber@ee.unlv.edu |
|
1000
|
36
|
Design of 1.5V-3GHz CMOS multi loops chained two stages VCO | POSTER | TPP2 | g1991212@inhavision.inha.ac.kr |
|
1000
|
37
|
A Process Variation Compensated Comparator for FSK Demodulators | LECTURE | TP4 | kimho@ee.eng.ohio-state.edu |
|
1000
|
38
|
On Efficient Cascade Implementation of Narrow Band Decimator Filter for Sigma-Delta Modulators | LECTURE | WA4 | lirida.naviner@wanadoo.fr |
|
1000
|
39
|
A study on delta-sigma A/D-converters based on SSCT-technology | LECTURE | TA3 | rha@ee.oulu.fi |
|
1000
|
40
|
A High Throughput FPGA Implementation of A Bit-Level Matrix-Matrix Product | POSTER | WPP1 | A.Abbes@qub.ac.uk
|
|
1000
|
41
|
A NOVEL LOW-POWER HIGH-LINEARITY CMOS FILTER FOR WIDEBAND WIRELESS COMMUNICATIONS | LECTURE | S2 | shi.30@osu.edu |
|
1000
|
42
|
Current Compensation Method for Adjustment Free Stereo Multiplex Voltage Control Oscillator in FM Receiver | POSTER | FAP1 | pa3529769@ntu.edu.sg |
|
1000
|
44
|
Analysis of formal randomness in a chaotic random number generator. | POSTER | TAP1 | ajn@tde.lth.se |
|
1000
|
45
|
CMOS Front-end Amplifier Dedicated to Monitor Very Low Amplitude Signal from Implantable Sensors | LECTURE | WP3 | huyamu@vlsi.polymtl.ca |
|
1000
|
46
|
Analog AC BIST with Inverted Stimulus | POSTER | TPP1 | provost@ee.tamu.edu |
|
1000
|
47
|
A CMOS INVERSE TRIGONOMETRIC FUNCTION CIRCUIT | POSTER | WPP2 | seon@elec.enst.fr |
|
1000
|
50
|
Radio Frequency DC–DC Flyback Converter | LECTURE | WA6 | dcz@pl.poly.edu |
|
1000
|
51
|
A ZVT-PWM single stage PFC converter with an active snubber | LECTURE | WA6 | guwei@rikaxp.riken.go.jp |
|
1000
|
52
|
CMOS 5-10 GHZ OSCILLATORS FOR LOW VOLTAGE RF APPLICATIONS | POSTER | WPP2 | ahmed@macs.ece.mcgill.ca |
|
1000
|
53
|
RANK-ORDER FILTER USING MULTIPLE-WINNERS-TAKE-ALL | POSTER | WPP2 | tuli@ee.tamu.edu |
|
1000
|
54
|
CMOS Wide-Swing Differential VCO for Fully Integrated Fast PLL | LECTURE | TP4 | fouzar@grm94.polymtl.ca |
|
1000
|
55
|
An Analysis of Analog to Digital Conversion and Harmonic Distortion | LECTURE | TA3 | jwbruce@ieee.org |
|
1000
|
56
|
A SIMPLIFIED ANALYTICAL MODEL FOR NONLINEAR DISTORTION IN RF BIPOLAR CIRCUITS | POSTER | TPP1 | ahhelmy@gega.net |
|
1000
|
57
|
A High Speed 3.3V Current Mode CMOS Comparators with 10-b Resolution. | POSTER | TPP2 | nobuo@dee.feis.unesp.br |
|
1000
|
59
|
A High Frequency CMOS 4 th Order digitally programmable Bandpass Filter | POSTER | WPP2 | mezyad@iastate.edu |
|
1000
|
60
|
A High Speed Fully differential CMOS Opamp | POSTER | TAP2 | nyounis@hotmail.com |
|
1000
|
61
|
An Adjustable CMOS Load Line for Nonlinear Circuits | POSTER | TAP2 | xhhe@glue.umd.edu |
|
1000
|
62
|
A CMOS Imaging Chip for Real-Time Range Finding | LECTURE | FA2 | sicheng@ee.tamu.edu |
|
1000
|
63
|
Design of Wideband Low Noise Transimpdance Amplifiers for Optical Communications | LECTURE | S5 | cbyahya@mindspring.com |
|
1000
|
65
|
High Frequency VCO-derived filters | LECTURE | S2 | htchen@iastate.edu |
|
1000
|
66
|
A Simple Linear Transresistor | POSTER | FAP1 | schlarm@iastate.edu |
|
1000
|
67
|
Impact of Model Errors on Predicting Performance of Matching Critical Circuits | LECTURE | FP2 | mflan@iastate.edu |
|
1000
|
75
|
MAXIMIZING THE OSCILLATION FREQUENCY OF CMOS VCOS | POSTER | FAP1 | huitingchen@hotmail.com |
|
1000
|
76
|
ANALOG VLSI WEIGHTED MEDIAN FILTERS | POSTER | FPP | adiazsan@nmsu.edu |
|
1000
|
77
|
Cascode Current Mirrors with Low Input, Output and Supply Voltage Requirements | POSTER | WPP2 | congyh@iastate.edu |
|
1000
|
80
|
AN ANALOG MEDIAN FILTER FOR VERY LOW POWER APPLICATIONS | POSTER | WAP2 | adiazsan@inaoep.edu |
|
1000
|
84
|
Fast-Settling Amplifier Design Using Feedforward Compensation Technique | POSTER | WPP2 | jyan@iastate.edu |
|
1000
|
85
|
A New Charge Redistribution D/A and A/D Converter Technique —Pseudo C-2C Ladder | POSTER | WPP2 | congl99@yahoo.com |
|
1000
|
86
|
Optimal Switching Sequences for One-dimensional Linear Gradient Error Compensation in unary DAC Arrays | LECTURE | FP2 | congyh@pop-3.iastate.edu |
|
1000
|
87
|
Voltage Gain Enhancement Technique by Negative Impedance Load in CMOS Op Amp Design | POSTER | WPP2 | jyan@mail.ee.iastate.edu |
|
1000
|
90
|
Nonlinearity of Gm-C in Band-Pass sigma-delta modulators | LECTURE | WA2 | keramat@engr.uconn.edu |
|
1000
|
91
|
A capacitor mismatch and gain insensitive 1.5 bit/stage pipelined a/d converter | LECTURE | WA2 | keramat@ee.tamu.edu |
|
1000
|
92
|
TIME-INTERLEAVED DELTA-SIGMA MODULATORS USING ZERO-INSERTION INTERPOLATION | POSTER | FPP | kozakm@cmsa.wmin.ac.uk |
|
1000
|
93
|
A High-Frequency High-Q CMOS Active Inductor with DC Bias Control | LECTURE | S2 | karsilay@ee.tamu.edu |
|
1000
|
94
|
SIGMA-DELTA MODULATORS WITH INTERSTAGE GAIN SCALING | LECTURE | WA2 | wzheng@poci.amis.com |
|
1000
|
95
|
functionality of quantization noise in sigma delta modulators | LECTURE | TP2 | keramat@engr.uconn.edu |
|
1000
|
96
|
Components of a 12-bit 50 Ms/s Non-radix 2 Pipeline Analog-to-Digital Converter | POSTER | WPP1 | huiliu@iastate.edu |
|
1000
|
97
|
A Calibration Algorithm for a 16-bit Multi-path Pipeline ADC | POSTER | WAP2 | marwan@iastate.edu |
|
1000
|
98
|
EVOLUTION OF A FOLDED FLOATING-GATE DIFFERENTIAL PAIR | LECTURE | WA3 | minch@ee.cornell.edu |
|
1000
|
99
|
Low Power S-D Analog-to-Digital Converter for Temperature Sensing and Voltage Monitor | LECTURE | WA2 | wangjins@hotmail.com |
|
1000
|
102
|
CURRENT MIRROR BASED FOLDING AMPLIFIER | LECTURE | WA3 | ycli@ee.tamu.edu |
|
1000
|
104
|
LOW-VOLTAGE CMOS ANALOG SWITCH FOR HIGH PRECISION SAMPLE-AND-HOLD CIRCUIT | LECTURE | TA4 | fayomi@macs.ece.mcgill.ca |
|
1000
|
105
|
ACTIVE CURRENT MIRROR RECEIVER | LECTURE | TA4 | brown@umich.edu |
|
1000
|
106
|
ON DESIGN OF NARROW-BAND LOW-NOISE AMPLIFIERS WITH INDUCTIVE SOURCE DEGENERATION | LECTURE | WA3 | igor@ee.ualberta.ca |
|
1000
|
107
|
CHARGE-MODE PARALLEL ARCHITECTURE FOR MATRIX-VECTOR MULTIPLICATION | POSTER | WPP2 | roman@bach.ece.jhu.edu |
|
1000
|
109
|
Low-Voltage High performance CMOS Current Mirrors | POSTER | TPP2 | jramirez@nmsu.edu |
|
1000
|
110
|
a Comparison of Basic Operational Amplifier Models | LECTURE | S7 | pbaron01@homer.louisville.edu |
|
1000
|
111
|
A 70Mhz 70 db Gain VGA with Automatic Continuous-Time Offset Cancellation | LECTURE | WP3 | eeluong@ee.ust.hk |
|
1000
|
113
|
A Folded 32-bit Prefix Tree Adder in 0.16-micrometer Static CMOS | LECTURE | WP6 | goldovsky@lucent.com |
|
1000
|
114
|
A Two-Stage Differential CCO Implementation in Submicron CMOS | LECTURE | WP3 | salama@vrg.utoronto.ca |
|
1000
|
117
|
Limitations of Criteria for Testing Transistor Circuits for Multiple DC Operating Points | LECTURE | FA3 | ljilja@cs.sfu.ca |
|
1000
|
118
|
CHARGE-BASED CMOS FIR ADAPTIVE FILTER | POSTER | FPP | milutin@bach.ece.jhu.edu |
| 1000 | 119 | A 900mhz front end design with Copper Passive Componentes | POSTER | TAP2 | jkim@ece.umn.edu |
| 1000 | 120 | A Hybrid Analog/Digital Chaotic Associative Memory | LECTURE | S7 | d.a.miller@ieee.org |
| 1000 | 121 | Interaction of Threshold Voltage and Mobility Temperature Dependancies Applied to Stabilisation of Current and Voltage | LECTURE | S7 | igor@ee.ualberta.ca |
| 1000 | 122 | high Frequency Chua's Circuit | LECTURE | S7 | pbaron01@homer.louisville.edu |
| 1000 | 124 | An Exponential Model of Chanel-Length Modulation Applied Towards Floating-Gate Circuits | LECTURE | S8 | phasler@ece.gatech.edu |
| 1000 | 126 | Basics of Floating-Gate Low-Drop Out Voltage Regulators | LECTURE | S8 | phasler@ece.gatech.edu |
| 1000 | 127 | A continuously-Adapting Analog Node Using Floating-gate Synapses | LECTURE | S8 | phasler@ece.gatech.edu |