CHRONOLOGICAL PROGRAM STRUCTURE
Wednesday August 9
| 8:30am -9:00am | Welcoming Remarks (From President MSU, Dean Engineering, General Chair & Program Chair) | Ballrm 5-8 |
| 9:00am -10:00 am | Plenary Session 1: Prof Mohsen Kavehrad, Penn State
University
PL1 Next generation Wireless Communications Systems |
Ballrm 5-8 |
| 10:00am - 10:30am | Beverage Break | Concourse |
| 10:30am-12:00 noon | S1
: Signal Processing for Advanced
Communication Networks
WA1 : Microwave Circuits and Devices WA2 : Delta Sigma Analog to Digital Convertor WA3 : Current Issues in Amplifier Design WA4 : Digital Filters WA5 : Low Power Circuits and Systems WA6 : Power Electronics WAP1 : Circuit Simulation, Design and Testing (Poster Session) WAP2 : Digital VLSI Circuits (Poster Session) |
Rm 101 |
| 12:00 noon -1:30pm | Luncheon - Address by representative from Steering Committee MWSCAS | Ballrm 1-4 |
|
1:30 pm - 2:30 pm 2:30 pm - 2:50 pm
Beverage Break 2:50 pm -3:50 pm |
S2
: High-Frequency Continuous-Time Filters
WP1 : MEMS Circuits and Systems WP2 : Coding and Encryption WP3 : CMOS Amplifier WP4 : Low Power Circuit and System Design WP5 : Topics in DSP Arithmetic WP6 : Computer Systems WPP-1 Digital circuits and Digital Signal Processing (Student Contest : Poster Session ) WPP-2 Analog Circuits and Analog Signal Processing (Student Contest : Poster Session ) |
Rm 101 Ballrm 1-4 Ballrm 1-4 |
| 4:00 - 5:30 pm | Panel Session 1
P1 Internet based Circuit Design and Test |
Ballrm 5-8 |
| 6:30 pm - 7:30 pm | Steering Committee Meeting | Radisson |
Thursday August 10
Friday August 11