43rd IEEE Midwest Symposium on Circuits and System (MWSCAS-2000)

CHRONOLOGICAL PROGRAM STRUCTURE


Wednesday August 9
 
8:30am -9:00am Welcoming Remarks (From President MSU, Dean Engineering, General Chair & Program Chair) Ballrm 5-8
9:00am -10:00 am Plenary Session 1: Prof Mohsen Kavehrad, Penn State University 
PL1 Next generation Wireless Communications Systems
Ballrm 5-8
10:00am - 10:30am Beverage Break  Concourse
10:30am-12:00 noon  S1 : Signal Processing for Advanced Communication Networks
WA1 : Microwave Circuits and Devices
WA2 : Delta Sigma Analog to Digital Convertor
WA3 : Current Issues in Amplifier Design
WA4 : Digital Filters
WA5 : Low Power Circuits and Systems
WA6 : Power Electronics
WAP1 : Circuit Simulation, Design and Testing (Poster Session)
WAP2 : Digital VLSI Circuits (Poster Session)

Rm 101
Rm 102
Rm 103
Rm 104
Rm 201
Rm 202
Rm 203
Ballrm 1-4
Ballrm 1-4

12:00 noon -1:30pm Luncheon - Address by representative from Steering Committee MWSCAS Ballrm 1-4

1:30 pm - 2:30 pm 


2:30 pm - 2:50 pm

Beverage Break

 2:50 pm -3:50 pm

S2 : High-Frequency Continuous-Time Filters
WP1 : MEMS Circuits and Systems
WP2 : Coding and Encryption 
WP3 : CMOS Amplifier
WP4 : Low Power Circuit and System Design
WP5 : Topics in DSP Arithmetic
WP6 : Computer Systems
WPP-1 Digital circuits and Digital Signal Processing (Student Contest : Poster Session )
WPP-2 Analog Circuits and Analog Signal Processing (Student Contest : Poster Session )

Rm 101
Rm 102
Rm 103
Rm 104
Rm 201
Rm 202
Rm 203

Ballrm 1-4

Ballrm 1-4
 

4:00 - 5:30 pm  Panel Session 1
P1  Internet based Circuit Design and Test
Ballrm 5-8
6:30 pm - 7:30 pm Steering Committee Meeting Radisson

Thursday August 10
 
8:30am -9:30 am Plenary Session 2: Prof. Wasfy Michael; University of Central Florida
PL2 Filtering and Signal Processing : from weight reduction to evolutionary learning
Ballrm 5-8
9:40 am - 10:40 am 
10:40 am - 11:00 am

Beverage Break

11:00 am -12:00 noon

S3 : Recent Advances in Communication Systems
S4 :  Low-Rate Speech Coding and Applications
TA1  Video and Image Processing and Compression
TA2  Distribution and Control in Power Machinery
TA3  Analog to Digital Converters
TA4  Solid State Circuits and Devices
TAP-1 Topics in Digital Signal Processing (Poster Session)
TAP-2 Topics in CMOS Solid State Circuits (Poster Session)

Rm 101
Rm 102
Rm 103
Rm 104
Rm 201
Rm 202
Ballrm 1-4
Ballrm 1-4

12:00 noon -1:30 pm Lunch Break   
1:30 pm - 2:30 pm 
2:30 pm - 2:50 pm

Beverage Break

 2:50 pm -3:50 pm

S5 : Communication Circuits: Detection and Frequency Synthesis
S6 : Neural Networks and Applications
TP1 Adaptive Signal Processing
TP2 Analogue-to-Digital Converters
TP3 Robotics and Control
TP4 Circuits and Signal Processing for High Speed Communications
TPP-1 VLSI Circuit Design and Simulation (Poster Session)
TPP-2 Current Issues in CMOS Circuit Design (Poster Session)

Rm 101
Rm 102
Rm 103
Rm 104
Rm 201
Rm 102
Ballrm 1-4
Ballrm 1-4

4:00 pm -5:30 pm Panel Session 2
P2  The role of Circuit and System Technologies in emerging Telecommunications Scenario
Ballrm 5-8
7:30 pm

Banquet Dinner - Presentation of Awards
Address by Dean of Engineering, MSU, General Chair.

Ballrm 1-4

Friday August 11
 
8:30am -9:30 am Plenary Session 3: Dr. Stephen M. Highstein, Washington University  School of Medicine
PL3 Signal Processing by Floccular and Ventral Parafloccular Purkinje cells
Ballrm 1-4
9:40 am - 10:40 am 
10:40 am - 11:00 am

Beverage Break

11:00 am -12:00 noon

S7 : Analog Circuit Modeling,Simulation and Applications
S8 : Current Research in Floating-Gate Circuits
FA1 Bio-Inspired Signals and Systems
FA2 Image and Video Coding and Processing
FA3 Modelling and Simulation
FA4 Wavelets,Filter Banks and Transforms
FA5 Topics in Digital Signal Processing
FAP-1 Topics in Analog Circuits and Analog SP (Poster Session)
FAP-2 Topics in Digital Circuits and DSP (Poster Session)

Rm 101
Rm 102
Rm 103
Rm 104
Rm 201
Rm 202
Rm 203
Ballrm 1-4
Ballrm 1-4

12:00 noon -1:30pm Lunch Break   
1:30 pm - 3:00pm  FP1 Topics on Low-noise Solid State Circuits
FP2 Topics on A/D and D/A Converters
FP3 Topics on Neural Networks
FP4 Topics on Digital Signal Processing 
FP5 Topics on Fuzzy Logic
FP6 Topics on Analog Circuits
FPP Applications of Signal Processing (Poster Session)

Rm 101
Rm 102
Rm 103
Rm 104
Rm 201
Rm 202
Ballrm 1-4